Kaushik Velapa Reddy. RECONFIGURABLE FPGA-BASED ACCELERATION OF RTL SIMULATION AND CO-SIMULATION FOR DATACENTER WORKLOADS. IJCET [Internet]. 2025 May 27 [cited 2026 Mar. 13];16(3):211-40. Available from: https://ijcet.in/index.php/ijcet/article/view/IJCET_16_03_017