KAUSHIK VELAPA REDDY. RECONFIGURABLE FPGA-BASED ACCELERATION OF RTL SIMULATION AND CO-SIMULATION FOR DATACENTER WORKLOADS. INTERNATIONAL JOURNAL OF COMPUTER ENGINEERING AND TECHNOLOGY, [S. l.], v. 16, n. 3, p. 211–240, 2025. DOI: 10.34218/IJCET_16_03_017. Disponível em: https://ijcet.in/index.php/ijcet/article/view/IJCET_16_03_017.. Acesso em: 13 mar. 2026.